Senior Design Verification Engineer
Senior Design Verification Engineer
ALTEN Calsoft LabsEarly Applicant
- Posted 2 months ago
- Be among the first 10 applicants
Job Description
GFx IP Verification Engineer
Job Description:
- Develop and maintain UVM-based verification environments for Graphics (GFx) IP blocks.
- Create comprehensive test plans based on design specifications and architecture.
- Execute simulations, analyze waveforms, and debug functional issues.
- Work closely with design and architecture teams to validate GPU/display pipeline components.
- Strong experience in SystemVerilog, UVM, and scripting (Python/Perl/TCL).
- Exposure to graphics standards such as HDMI, DisplayPort, or MIPI DSI is preferred.
- Perform coverage analysis and ensure thorough validation of corner cases.
- Familiarity with performance modeling, power-aware verification, or emulation is a plus.
Experience: 4+ Years.
Location: Bengaluru / Hyderabad.
Notice Period: 30 Days only.
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Key Skills
About Company
Skills:
Universal Verification Methodology (UVM), Micro-Organic Light Emitting Diode (OLED), C, C++, Makefile, Perl, Python, Palladium, systemverilog, Zebu, Veloce, MicroLED
Skills:
Usb, Mac, Pcie, Perl, Ethernet, Shell scripting, System Verilog, Python, Tcl, AHB-Lite, Uvm, AMBA, Axi, APB
Skills:
Unix, Makefile, Configuration Management, Shell, PERL, System Verilog, Python, ARM CPU, PCI Express, verification dashboarding tools, Uvm, AMBA bus protocols, Ethernet bus protocols
Skills:
Shell, Perl, Verilog, Python, Tcl, Functional and code coverage, Simulation and debugging concepts, Automation scripts, Assertions SVA, UVM methodology, systemverilog
Skills:
Usb, Tcl, Ethernet, Python, Perl, Pcie, DDR, systemverilog, Uvm, coverage-driven verification, AMBA, digital design RTL understanding, SVA, MIPI