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Post-Silicon Validation FPGA

Post-Silicon Validation FPGA

Altera
Early Applicant
  • Posted 4 days ago
  • Be among the first 10 applicants

Job Description

Job Details

Job Description:

Role summary

Support FPGA-based post-silicon validation: design bring-up, hardware testing (PVT and non-PVT), regression, and design/test automation. Build hands-on skill in lab HW, scripting, and RTL-aware debug under senior guidance.

Key responsibilities

  • Execute FPGA post-silicon validation plans: functional, feature, regression, and stress
  • Support design bring-up: power-on, clocks, reset, link-up, and basic feature checks
  • Run PVT testing (voltage / temperature / corner sweeps) and non-PVT HW tests
  • Execute and maintain regression suites (manual and automated); triage failures and re-run as needed
  • Develop and maintain design/test automation using Python, Tcl, and C as needed
  • Read and use RTL for debug, signal tracing, and understanding expected behavior
  • Use FPGA tools and lab instruments for HW bring-up and failure isolation
  • File clear bugs with logs, setups, and repro steps
  • Work with design, DV, and related teams on triage and closure
  • Document procedures, automation, regression results, and status

oft skills

  • Methodical, lab-safe, eager to automate repetitive validation and regression work
  • Quick learners; owns assigned test, regression, and automation tasks

Qualifications

Required qualifications

  • B.E. / B.Tech / M.S. in ECE, EE, Computer Engineering, or related
  • 3–5 years in post-silicon validation, FPGA validation, HW test, or related
  • HW knowledge: digital fundamentals, FPGA/SoC basics, lab bring-up comfort
  • Experience or coursework exposure to test execution / regression (lab or simulation)
  • Automation: practical Python for test/lab automation and regression runs
  • Scripting / embedded: Tcl and C for tool flows, firmware-style, or board/test control
  • RTL: ability to read Verilog/SystemVerilog (or VHDL) and relate failures to design behavior
  • Familiarity with FPGA flows (compile, program, basic on-chip debug)
  • Clear written communication for bugs and status

Job Type

Regular

Shift

Shift 1 (India)

Primary Location:

Bengaluru, Karnataka, India

Additional Locations:

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

More Info

Job Type:
Function:
Employment Type:

Key Skills

FPGA tools

lab instruments

About Company

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5-8 yrs
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