Physical Verification Engineer
- Posted 2 months ago
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Job Description
Experience of 5+ years in Physical verification and closure.
Location: Bangalore
NP - Immediate
Main responsibility of the candidate will be around achieving a clean GDS view with below key items:
Physical Verification closure for Arm CPU implementation:
- Should have completed multiple tape-outs with Physical Verification closure role in the past
- Strong understanding of DRC/LVS/PERC/Antenna/DFM and associated concepts for advanced
- nodes on TSMC and Samsung foundries
- Needs to run Physical Verification on Arm CPU designs on advanced technology nodes
- Needs to run fixing for DRC/LVS/PERC/Antenna/DFM on base/metal layers and give recommendation for P& R tool flow
- Good knowledge of advanced technology nodes like Samsung foundry (4nm/3nm) is extremely useful
More Info
Job Type:
Industry:
Function:
Employment Type:
Key Skills
Samsung foundries
Arm CPU designs
DRC
TSMC
advanced technology nodes
PERC
About Company
Skills:
PV fixing, Esd, DRC, Innovas
Skills:
Tcl, Unix Shell, Python, Perl, ICV, LVS, Cadence Virtuoso, DRC, Calibre, PERC
Skills:
Scripts, ERC, ASIC physical verification methodologies, physical verification methodologies, sign-off processes, LVS, EDA Tools, DRC, automation flows, physical verification checks
Skills:
Perl, Python, Tcl, Calibre, ANT Density, Physical Verification, Mentor Calibre, ERC, DRC, LVS, Dfm
Skills:
OASIS, Verilog, Python, Shell, Perl, Tcl, PERC, LVS, CDL, Dfm, SVRF-based automation, XOR methodologies, antenna density, ASIC physical verification, Spice, Cadence Pegasus, DEF, LEF, Siemens Calibre nmDRC, metal-fill, ERC, DRC, Synopsys ICV, GDSII