Digital Design Engineer, DFT
Digital Design Engineer, DFT
Analog Devices- Posted 11 hours ago
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Job Description
About Analog Devices
Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.
As a key member of the team, he/she will be responsible for:
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
Job Req Type: Experienced
Required Travel: Yes, 10% of the time
Shift Type: Normal Time (Philippines)
Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.
As a key member of the team, he/she will be responsible for:
- DFT specifications, architecture and implementation using state-of-the-art methodologies and tools
- Support various product lines for DFT insertion
- Support various product lines for High Coverage, Low Power, Low Test Time scan patterns
- Pre/Post silicon verification & debug
- Work independently as well as in team
- Masters of Science degree in Electrical Engineering, Computer Engineering or similar
- 2 years of directly related experience in ASIC/SoC DFT
- Good understanding of DFT architecture and planning
- Hands on scan insertion and ATPG Tool experience
- Hands on experience of DFT Compression Insertion, On-Chip Clock Control Insertion
- Hands on experience of Gate-level simulation with zero delay and SDF
- Good understanding of Failure Analysis
- Scripting: Perl/Python/Tcl
- Team-player: the ability to forge and maintain relationships with peer-organizations
- Strong written and verbal communication skills
- Experience with Tessent DFT tools
- Good understanding of IEEE 1149 and JTAG
- Experience with LBIST and MBIST
- Experience with advanced DFT technologies like low power, SSN, Fault Grading.
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
Job Req Type: Experienced
Required Travel: Yes, 10% of the time
Shift Type: Normal Time (Philippines)
More Info
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Key Skills
SSN Fault Grading
Tessent DFT tools
advanced DFT technologies
DFT specifications architecture and implementation
ATPG Tool experience
Gate-level simulation with zero delay and SDF
Scripting Perl
DFT insertion
On-Chip Clock Control Insertion
IEEE 1149
Pre Post silicon verification debug
DFT architecture and planning
High Coverage Low Power Low Test Time scan patterns
LBIST
DFT Compression Insertion
