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Showing 4 jobs
Skills:
power optimization , Cpu, Noc, Tcl, Verilog, Networking, System Verilog, Python, Perl, LINT, Synthesis, High-Level Synthesis, Micro-architecture Development, Peripheral Subsystems, cdc, RTL Coding, Formal Verification Methodology, Timing Closure, Shell-scripting, power analysis
Skills:
rtl development , Verilog, System Verilog, ASIC Engineer Design, Architecture exploration, Micro-architecture development
Skills:
Design Verification, ASIC Design, Verification Planning, systemverilog, Rtl Design
Skills:
Pcie, Version Control, Ethernet, RTL synthesis, Documentation, Timing Closure, verification processes, silicon bring-up, bare metal firmware development, SERDES, AI tools like Cursor
