cdegs , Ms Office, HV and EHV Substation design, HVDC Performance Specifications, CYMCAP, FURSE, LCC VSC HVDC technologies, FEED or Detailed design of HV and EHV 132kV to 765kV AIS GIS and HVDC Substations, Preparation of detailed primary deliverables drawings, Power system studies involving Network modelling simulation analysis and Validation of HVDCs using PSCAD Software, Autocad 2D

Schematic Design, Control-Loop Stability, power management, Analog Layout Effects, ESD Latch-Up, Mixed-Signal IC Development, Protection Circuits, Switching Converters, Extraction, Post-Layout Verification, Analog Design, References, Sensors, Data Converters, Charge Pumps, Signal-Conditioning Blocks, Simulation, IC-Level Robustness, LDOs, Analog Feedback Loops

Tcl, Python, Perl, Spice simulations, ASIC back-end flows, Timing Constraints, AOCV, Monte Carlo analysis, noise, cross-talk, STA fundamentals, Hspice, POCV concepts, CTS, Innovus, ICC2, primetime, Tempus, Signal Integrity, Parasitic Extraction, scripting proficiency, STA tools, FineSim