Perl, Verilog, Gdb, Python, SV-UVM, e-specman

C, C++, Bash, Perl, Verilog, Python, Tcl, IP architecture, Debug, stimulus development, verification planning, Digital Design, Uvm, systemverilog, scoreboards, assertions, functional coverage

Uart, Nvme, Verilog, I2c, Pcie, Flash, system debug infrastructure, Uvm, system memory hierarchy, AMBA bus protocols, systemverilog, digital ASIC design and verification, formal verification, ARM cores and related infrastructure, CXL, DRAM, CPUSS C-based verification, multi-core SOC, SSP

Ovm, Verilog, System Verilog, C, Systemc, PERL, Shell script, Assembly Language, dpi, SoC Verification, Uvm, Emulation

Universal Verification Methodology (UVM), Micro-Organic Light Emitting Diode (OLED), C, C++, Makefile, Perl, Python, Palladium, systemverilog, Zebu, Veloce, MicroLED

scripting languages (Perl, Python), constrained random techniques, HVLs, Uvm, debugging RTL and Gate simulations

Verilog, formal verification, VHDL, Chisel, JasperGold, VC Formal, Object-oriented Programming, Formal Abstraction Techniques, systemverilog