NAND Flash Memory, Test Bench development in System Verilog, Memory Logic circuits, Uvm

System Verilog, TLBs, Scheduler, Page table walkers, Register mapping, Bypass networks, Store buffer, Debug tools, Uvm, Flush replay, Issue queue, Reorder buffer, Instruction decode, Memory consistency models, Coherence protocols, Protection, Stores, Speculative loads, Instruction fetch, Cache hierarchy, Physical register files, Interrupt handling, MMU, LR SC, Atomics