synopsys primetime , Tcl, Python, Perl, SI noise analysis, AOCV, MMMC methodologies, timing exceptions, POCV, OCV, clocking methodologies

Perl scripting, Synthesis, Physical Design, primetime, Functional and DFT modes, Flow automation, SoC design and implementation methodology, Constraint development, Digital ASIC design

Ecos, Perl, Python, Tcl, FC PrimeTime, Sta, Design Compiler, CTS, EM, physical signoff, Ir, advanced-node SoCs, congestion optimization, ASIC Physical Design Full-Chip Implementation, MCMM, design closure, low-power implementation, PPA trade-offs, Synopsys ICC2

Perl, Python, Tcl, Clock domain partitioning, Block and subsystem-level physical design flows, primetime, Power integrity and power-aware physical implementation, Clock gating, Fusion Compiler, Congestion analysis and resolution, Clock tree architecture, Tempus, Cadence Innovus, Skew management, Certus, Synopsys ICC2, Timing closure and constraint management

power integrity , Tcl, Routing, Python, Perl, Physical Sign off, Synthesis Constraints, Physical Verification, Equivalence Check, Metal fill, RTL2GDS flow, Signal Integrity, Chip finishing, Physical Design, Power Distribution Network, Clock Trees, Tapeout checks, Placement, Floorplans, Timing Closure, Sealring

Gatling, Agile Scrum, Typescript, Jmeter, Javascript, Automation Frameworks, Performance Testing, Python, AWS, Java, Regression Testing, Jenkins, Gcp, Azure, CI CD workflows, Model integration, GitHub Actions, Data validation testing, CircleCI, k6, GitLab CI, Analytics pipelines, AI ML workflows, AI tools for automation