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Showing 2 jobs
Skills:
static timing analysis, PCIe protocol stack, MSI interrupt handling, Simulation Tools, CDC design principles, systemverilog, asynchronous FIFO implementation, RTL design using Verilog, DMA engines, PXC interfaces, Synthesis, linting, formal verification, waveform debugging, assertion-based design methodologies
Skills:
System Verilog, Pcie, Uvm, PXC, CXL, RTL Design using Verilog
